Glasses of various compositions are frequently used to seal exposed silicon surfaces of solid state electronic devices, particularly areas adjacent to the intersection between regions of opposite conductivity type. The glass layer is used to properly passivate the surface by preventing undersirable surface effects from influencing device characteristics. For example, in a thyristor which is a 4 layer p-n-p-n switching device such as a silicon-controlled rectifier (SCR) or a three-element static a-c switch (TRIAC), the junction between the p.sup.+ anode or gate layers and the n.sup.- layer is intersected by a moat etched into the silicon wafer. Typically lead-boro-silicate or lead-boro-alumino-silicate glasses are utilized for thyristor passivation in which the glass layer is patterned and deposited into and around the moat. After patterning, the passivation layer is fired. However, passivation layers such as noted above have a tendency to carry a negative charge after firing. In addition, certain organic passivation layers also tend to acquire a charge after an annealing or heat treatment step, or after a bias stress test.
Excessive negative passivation layer charge can cause an inversion of the silicon surface underneath it, in which the negative charge in the passivation layer is balanced by a positively charged depletion layer plus a positively charged inversion layer consisting of mobile carriers, i.e. holes. This inversion layer is within the silicon crystal adjacent to the passivation layer.
The inversion layer is undesirable because it forms a channel or conducting leakage path between layers of semiconductor material of opposite conductivity type. For instance in the aforementioned thyristor, excessive negative charge in the passivation layer causes a conductive path between the anode of the device and the severely damaged scribe line at the edge of the individual die or wafer. The scribe line is created during separation of semiconductor devices fabricated on a large substrate. The excessive negative charge also creates a conductive path between the scribe line and the gate of the device, such that there is a leakage path between anode and gate which can cause the thyristor to turn on. It is observed that the inversion layer current increases rapidly with temperature, and can cause thyristor turn-on from a forward blocking state as the temperature rises. The reason for the thyristor tunr-on is that current from the anode is channeled through inversion layers to and from the scribe line directly to the gate. This current in effect becomes the gate current and is oftentimes sufficient to turn on the device. Since current generation and inversion layer conductivity both rise rapidly with temperature, thyristors turn on at lower applied voltages when they are subjected to elevated temperatures.
The above-mentioned leakage path caused by the inversion layer can be observed before scribing by I-V probing between adjacent anodes or gates. In I-V probing an increasing voltage is applied between adjacent gates or anodes and the corresponding leakage current is recorded. The leakage current is a combination of the relatively low leakage through the bulk of the semiconductor material and the leakage at the surface of the wafer underneath the passivation layer between the two adjacent gates or anodes. When the surface leakage due to the inversion layer is eliminated, the leakage current drops markedly and corresponds to the relatively low bulk leakage. The I-V probing technique thus establishes a base line from which to measure inversion layer leakage and thus the extent of the inversion layer.
Given a fixed or predetermined glass composition, previous well known methods of varying glass process variables, such as the temperature of firing or annealing, the firing cycle, and the firing atmosphere, often offer only a limited degree of control over the final glass charge.
It is known that the glass charge can be altered in either direction in a controllable manner after firing by applying combined voltage bias and temperature stress and that different glass compositions require different temperatures before significant shift in the glass charge, on the order of 10.sup.11 per cm.sup.2, occurs. The glass charge dependence on voltage bias and temperature stress is described in an article in the IBM Journal, September 1964, pps. 385-393, by D. R. Kerr.
One method of reducing glass charge by applying voltage bias requires formation of metal electrodes on the top of the passivation layer, a process incompatible with electroless metalization. This process is also incompatible with other metalization processes, since for the thyristor, electrodes must be deposited on both sides of a silicon wafer, and both top and bottom wafer surfaces must be biased to the same polarity versus the silicon bulk.
By way of further background, corona discharges have been utilized as a diagnostic tool to charge glass passivation layers or overcoats for the positioning of toning particles which are deposited over the semiconductor surface. Defects show up quite readily when the toning particles accumulate in various charged areas of the semiconductor surface. In this diagnostic technique a corona discharge is applied to the semiconductor surface for only a very short period of time which is too short to affect the inversion layer and therefore too short to reduce leakage. Such a diagnostic technique is described in the Journal of Vacuum Science Technology, 14, 32 (1977), by W. Kern and R. B. Comizzoli. Note also that the constituents of corona discharges are discussed in an article entitled Mass Spectrometric Studies of Corona Discharges in Air at Atmospheric Pressures, The Journal of Chemical Physics, Vol. 43, No. 7, Oct. 1, 1966, by M. M. Shahin.
While the above problem has been described in connection with thyristors, the problem of passivation-induced leakage currents is prevalent in any types of semiconductor devices, whether PNP or NPN devices.